Drimva

Qualcomm

Sr/Staff RFIC Design Engineer

$134K–$201K

San Diego, California · On-site · Staff · Full-time · Posted Sep 17, 2026

Experience
Bachelor's route: 3+ years designing RF/Analog circuits for wireless products and 2+ years of ASIC design, verification, or related work. Master's route: 2+ years of ASIC design, verification, or related work. PhD route: no experience specified. All routes: 2+ years using two or more specified software tools.
Education
Bachelor's degree in Electrical Engineering; OR Master's degree in Electrical Engineering or related field; OR PhD in Electrical Engineering or related field.

About the job

Design and develop RF integrated circuits and transceiver blocks for wireless applications, including circuit analysis, simulation, layout collaboration, and hardware debugging.

What you'll do

  • Contribute to architecture and design of RFIC blocks; run circuit simulations and assess performance.
  • Work with layout engineers on circuit floor planning, layout generation, and physical verification.
  • Write test plans and technical documentation, review test results, and debug circuit issues.

What they ask for

  • Bachelor's degree in Electrical Engineering plus 3+ years designing RF/Analog circuits for wireless products and 2+ years of ASIC design, verification, or related work; OR a Master's degree in Electrical Engineering or related field plus 2+ years of ASIC design, verification, or related work; OR a PhD in Electrical Engineering or related field.
  • 2+ years of academic or professional experience using two or more of CADENCE, Virtuoso, and ADS.

Nice to have

  • 3+ years of transistor-level RF analog IC design experience with a Master's degree in Electrical Engineering.
  • Experience in receiver/transmitter RF/Analog circuits, RF frequency synthesizers, digital control and signal processing, product commercialization, or electromagnetic simulation/modeling; or 1+ year in a large matrixed organization.

Pay

$133,900.00 - $200,900.00 USD (pay range; salary)

Tools

CADENCE, Virtuoso, ADS, Neural Networks

AI focus

Use Neural Networks for circuit optimization and analysis.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 4, 2026 (UTC)