Drimva

Qualcomm

Staff Engineer - Power Management IC Design

$160K–$239K

Santa Clara, California · On-site · Staff · Full-time · Posted Sep 17, 2026

Experience
6+ years with a bachelor's degree; 4+ years with a master's degree; or 2+ years with a PhD in analog, mixed-signal, or Power Management integrated circuit design. Also requires 2+ years of academic and/or work experience using specified design tools.
Education
Bachelor's degree in Electrical Engineering; or Master's degree in Electrical Engineering or related field; or PhD in Electrical Engineering or related field.

About the job

Leads the architecture, design, verification, layout oversight, and silicon bring-up of mixed-signal power management ICs for compute, data center, automotive, and industrial applications.

What you'll do

  • Owns design and verification strategy for assigned PMIC blocks and subsystems, including controller circuitry and high-current power stage interfaces.
  • Guides layout and performs circuit functionality, performance, physical, and reliability verification; analyzes simulation and silicon results and drives corrective actions.
  • Supports silicon bring-up, characterization, qualification, and production ramp with validation, test, and product engineering teams.

What they ask for

  • Bachelor's degree in Electrical Engineering and 6+ years of relevant IC design experience; or Master's degree in Electrical Engineering or related field and 4+ years; or PhD in Electrical Engineering or related field and 2+ years.
  • 2+ years of academic and/or work experience using CADENCE, SPICE, MATLAB, and/or Verilog/VHDL.

Nice to have

  • Master's Degree or PhD in Electrical Engineering.
  • Experience in one or more of: Power Electronics, Control Theory, Multiphase Buck Controllers, High-Accuracy Analog Front Ends, High-Speed or High-Drive Circuits, Very Low Power or Precision References, Electro-Migration and Transistor Reliability, Behavioral Modeling, or Mixed-Signal Verification Techniques.

Pay

$159,600.00 - $239,400.00 USD (pay range; salary/base pay)

Tools

Cadence ADE, Spectre, MathWorks MATLAB, MATLAB, Verilog/Verilog-AMS, SystemVerilog, Simplis, SPICE

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)