Qualcomm
Video DE Engineer
$176K–$263K
Santa Clara, California · On-site · Full-time · Posted Sep 17, 2026
- Experience
- Minimum: 4+ years with a bachelor's degree, 3+ years with a master's degree, or 2+ years with a PhD, in Software Engineering, Hardware Engineering, Systems Engineering, or related work. Preferred experience includes 4+ years in applicable video hardware and/or systems; 4+ years in hardware system design, integration, schematic capture, and circuit simulation software; 4+ years in programming, computer architecture, or embedded systems; 3+ years in a large matrixed organization; 1+ year interacting with senior leadership; and 1+ year in a technical leadership role.
- Education
- Bachelor's, master's, or PhD in Computer or Electrical Engineering, Computer Science, or related field.
About the job
Develops and integrates video, computer vision, and AI/ML accelerator hardware, from architecture and RTL implementation through verification and performance optimization.
What you'll do
- Research, design, implement, and verify video, computer vision, SLAM, and AI/ML accelerator hardware solutions.
- Analyze architectures, standards, and requirements; meet system performance, area, and power targets and resolve complex technical issues.
- Lead hardware integration and cross-team collaboration, and produce technical documentation for complex projects.
What they ask for
- Bachelor's degree in Computer or Electrical Engineering, Computer Science, or related field and 4+ years of relevant work experience; OR master's degree in those fields and 3+ years; OR PhD in those fields and 2+ years.
Nice to have
- Master's degree in Computer or Electrical Engineering, Computer Science, or related field.
- Experience in video hardware or systems, hardware system design and integration, programming, computer architecture or embedded systems; technical leadership and senior-leadership interaction experience.
Pay
$175,600.00 - $263,400.00 (base salary)
Tools
C, C++, Python, RTL
AI focus
Researches and develops AI/ML accelerator hardware, including architecture, RTL implementation, verification, and integration.
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