Drimva

River AI

Design Verification Emulation, Hardware

$200K–$420K

Austin, TX, Palo Alto, CA +1 · Full-time · Posted Sep 28, 2026

Location
Austin, TX, Palo Alto, CA
Austin, Texas, United States
Experience
5+ years of industry experience.
Education
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Visa sponsorship
The company sponsors visas; success is not guaranteed for every candidate or role.

About the job

Drives IP and SoC design verification on emulation platforms, developing workloads, models, infrastructure, and signoff processes.

What you'll do

  • Translate verification plans into emulation strategies; build and adapt models, test environments, and workloads.
  • Develop emulation platform bring-up, compile, mapping, runtime, regression, and debug flows; triage failures and support closure.
  • Apply agentic AI workflows across workload planning, runs, triage, analysis, and closure reporting.

What they ask for

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Hands-on experience with emulation platforms, including bring-up, model integration, compilation, execution, and debug.
  • Experience building or adapting models and test environments for simulation acceleration or emulator-hosted verification; complex IP or SoC verification experience.
  • Proficiency in SystemVerilog, C/C++, and scripting languages such as Python, Tcl, or Bash.

Nice to have

  • Experience with UVM-based verification environments and adapting them for acceleration or emulation.
  • Experience using emulation for software workloads, firmware and driver validation, system-level scenarios, or pre-silicon software bring-up.

Pay

$200,000 - $420,000 USD annual salary range (base salary)

Tools

Cadence Palladium/Protium, Synopsys ZeBu/HAPS, SystemVerilog, C/C++, Python, Tcl, Bash, UVM

AI focus

Build and apply agentic workflows for emulation workload planning, model and test preparation, platform setup, run orchestration, failure triage, result analysis, and closure reporting.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)