Drimva

River AI

Kernel Engineer (Custom Silicon), Hardware

$200K–$420K

Palo Alto, CA +3 · Full-time · Posted Jun 28, 2026

Location
Palo Alto, CA
Austin, TX
Austin, Texas, United States
Palo Alto, California, United States
Experience
5+ years of practical industry experience in low-level performance programming.
Education
Bachelor’s degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.
Visa sponsorship
River AI sponsors visas; it cannot guarantee success for every candidate or role.

About the job

Develop kernel-generation frameworks and optimize low-level deep learning operations for River AI’s custom silicon.

What you'll do

  • Build C++ code-generation frameworks that emit optimized assembly for the custom ISA.
  • Implement and tune deep learning kernels, including GEMM, attention, convolutions, and element-wise operations.
  • Profile and validate performance while collaborating with compiler, architecture, and RTL teams on hardware/software co-design.

What they ask for

  • Bachelor’s degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.
  • 5+ years of practical industry experience in low-level performance programming.
  • Proficiency in modern C++ and a strong understanding of hardware programming models, computer architecture, and deep learning primitives.
  • Proven track record of shipping highly optimized kernels.

Nice to have

  • Experience optimizing Tensor Cores, matrix multiply-accumulate units, or custom vector extensions.
  • Experience with advanced C++ template metaprogramming, code-generation techniques, or low-level hardware profiling tools.

Pay

$200,000 - $420,000 USD annual salary (base salary)

Tools

C++, CUDA, Triton, CUTLASS, custom accelerator assembly, custom ISA assembly

AI focus

Develop and optimize compute kernels for deep learning operations on custom silicon.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)