RosaicLabs
AI Accelerator Design Verification Engineer - Full Time
$125K–$250K
Santa Clara, CA +4 · Hybrid · Full-time · Posted Oct 5, 2026
- Location
- Santa Clara, CA
Austin, TX
remote-colorado
remote-india
remote-california - Education
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
About the job
Verifies AI accelerator chips by developing test environments, checking compute correctness, closing coverage, and debugging RTL across simulation, emulation, and FPGA platforms.
What you'll do
- Develop verification plans and SystemVerilog/UVM testbenches for AI accelerator blocks and SoC flows; run ML kernels and programs against reference models.
- Close functional and code coverage, debug failures, and apply formal verification, assertions, emulation, and FPGA testing as appropriate.
- Use and validate agentic AI tools throughout verification, and coordinate verification strategy with design, performance, CAD, and software teams.
What they ask for
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- Strong foundation in AI accelerator and computer architecture and digital design.
- Proficiency in System Verilog, C/C++, and assembly.
- Hands-on experience using agentic AI tools across engineering workflows, including critically checking their results.
Nice to have
- Familiarity with emulation-friendly verification, including synthesizable testbenches and transactors.
- Exposure to ML frameworks or workloads such as PyTorch, TensorFlow, or ONNX.
Pay
USD 125,000–250,000 (per-year-salary), base salary
Tools
SystemVerilog, UVM, C/C++, assembly, Python, Tcl, Rust, PyTorch
AI focus
Verifies AI accelerator hardware and numerical correctness; uses agentic AI tools for test planning, testbench development and review, regression triage, bug root-cause analysis, and coverage analysis.
Model-written summary · the original posting is authoritative