RosaicLabs
AI Accelerator Physical Design Engineer - Full Time
$125K–$250K
Santa Clara, CA +1 · Hybrid · Full-time · Posted Oct 5, 2026
- Location
- Santa Clara, CA
Austin, TX - Experience
- 5+ years of industry experience in high performance, low power physical design.
- Education
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
About the job
Own physical implementation and signoff of AI accelerator blocks and top-level designs, optimizing performance, power, and area.
What you'll do
- Implement accelerator designs through synthesis, floorplanning, power planning, placement, clock tree synthesis, routing, and signoff.
- Optimize timing, power, area, power integrity, and physical design; develop automation and track quality of results.
- Collaborate across architecture, RTL, DFT, and verification, and support silicon bring-up and result correlation.
What they ask for
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 5+ years of industry experience in high performance, low power physical design.
- Hands-on experience taking complex digital designs through synthesis, place-and-route, and signoff at advanced process nodes.
- Experience with timing closure and static timing analysis, power integrity, physical verification (DRC/LVS), and scripting in Tcl, Python, or Perl.
Nice to have
- Familiarity with accelerator or compute-array architectures, such as systolic arrays, SIMD/vector engines, and large on-chip memories.
- Proficiency with industry-standard EDA tools.
Pay
USD 125,000–250,000 per year (base salary)
Tools
Tcl, Python, Perl, DRC/LVS
AI focus
Physical design and implementation of AI accelerator blocks and top-level designs.
Model-written summary · the original posting is authoritative