RosaicLabs
CPU Physical Design Engineer - Full Time
$125K–$250K
Santa Clara, CA +1 · Hybrid · Full-time · Posted Oct 5, 2026
- Location
- Santa Clara, CA
Austin, TX - Experience
- 5+ years of industry experience in CPU or high-performance ASIC physical design.
- Education
- Master's degree in Electrical Engineering, Computer Engineering, or a related field.
About the job
Leads CPU physical design from microarchitecture tradeoffs through implementation, signoff, and PPA optimization.
What you'll do
- Develop gate-level and custom circuit designs for CPU blocks; drive synthesis, floorplanning, placement, CTS, and routing to closure.
- Own timing, signal-integrity, power-integrity, and physical/electrical signoff; debug violations across corners and modes.
- Improve physical-design flows and collaborate across teams to optimize PPA and investigate silicon-to-prediction gaps.
What they ask for
- Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 5+ years of industry experience in CPU or high-performance ASIC physical design.
- Experience with gate-level design, transistor-level/custom circuits, and driving synthesis and P&R to PPA closure.
- Knowledge of CPU microarchitecture, STA, signal integrity, DRC/LVS, industry-standard EDA tools, and scripting in Tcl, Perl, or Python.
Pay
USD 125,000–250,000 per year base salary
Tools
Tcl, Perl, Python, EDA tools, STA, P&R, DRC/LVS, CTS
Model-written summary · the original posting is authoritative