SambaNova
Physical Design Engineer, New Grad
$120K–$150K
San Jose, California, United States +1 · Entry level · Full-time · Posted Oct 27, 2026
- Location
- San Jose, California, United States
Austin, Texas, United States - Education
- B.S. in Electrical Engineering, Computer Engineering, or Computer Science.
About the job
Run and improve SambaNova’s RTL-to-GDS physical design flow for RDU chips on advanced process nodes.
What you'll do
- Run synthesis and place and route using Cadence tools, and help debug timing, congestion, and design rule issues.
- Write TCL and Python scripts to automate and improve the physical design flow.
- Work with tool vendors on bugs and flow improvements; maintain documentation and regression testing.
What they ask for
- B.S. in Electrical Engineering, Computer Engineering, or Computer Science.
- Coursework or project experience in VLSI or digital IC design.
- Understanding of the RTL-to-GDS flow, including synthesis and place and route.
- Scripting experience in TCL, Perl, or Python.
Nice to have
- M.S. or Ph.D. in a listed field; experience with Cadence or Synopsys tools; familiarity with static timing analysis or advanced-node physical design rules; AI tools such as Claude; internship or tape-out experience.
Pay
$120,000 — $150,000 USD base salary
Tools
Cadence Genus, Innovus, Cerebrus, TCL, Python, Perl, Claude, Synopsys
AI focus
Preferred experience using AI tools such as Claude for flow development.
Model-written summary · the original posting is authoritative