Principal Place and Route (PnR) Engineer

What you'll do

• Develop partitioning, placement, and routing algorithms within hardware resource constraints and practical compile times.
• Tune mappings for target workloads, including LLM inference, and investigate throughput gaps with performance engineers.
• Model evolving hardware constraints and build infrastructure for prototyping, regression testing, and deployment.

What they ask for

• M.S. or Ph.D. in Computer Science, Computer Engineering, or a related field.
• 3+ years developing optimization or graph algorithms in industry or research.
• Expert knowledge of graph algorithms, partitioning, combinatorial optimization, or MILP solvers; practical experience solving NP-hard problems using heuristics, approximation, or pruned exact methods.
• Strong proficiency in C/C++; familiarity with Python; experience designing large, highly parallel, performance-sensitive systems.

Nice to have

• Experience with place and route for FPGAs, CGRAs, or other spatial architectures; or ML compilers such as MLIR, LLVM, TVM, or XLA.
• Experience with simulated annealing, constraint programming, or SAT/SMT solvers; familiarity with vLLM and PyTorch; publications at FPGA, DAC, ICCAD, or MLSys.

Pay

$1 — $999,999 USD (base salary)

Tools

C/C++, Python, MILP, MLIR, LLVM, TVM, XLA, vLLM

AI focus

Maps workloads, including LLM inference and training, onto RDU hardware; tunes inference mappings for different batch sizes and concurrency levels.