Drimva

SambaNova

Principal Post-Silicon Validation Engineer

$180K–$255K

San Jose, California, United States · Principal · Full-time · Posted Aug 18, 2026

Experience
7+ years in post-silicon validation or system bring-up.
Education
M.S. in Electrical Engineering, Computer Science, or a related field.

About the job

Own post-silicon bring-up, debug, and validation of high-speed IO and memory subsystems for the DataScale platform, from first silicon through field deployment.

What you'll do

  • Lead subsystem characterization, validation, stress testing, performance analysis, and system-level debug to root cause.
  • Coordinate issue resolution across design, firmware, verification, system, and customer engineering teams; own validation sign-off for product release.
  • Develop debug infrastructure, scripts, and tooling; contribute to pre-silicon verification and improve validation methodology.

What they ask for

  • M.S. in Electrical Engineering, Computer Science, or a related field.
  • 7+ years of experience in post-silicon validation or system bring-up.
  • Experience with two or more high-speed IO or memory protocols, such as PCIe, Ethernet, HBM, CXL, or UCIe.
  • Proficiency in scripting such as Python and bash; proven ability to lead cross-functional debug to root cause and closure.

Nice to have

  • Deep understanding of high-speed SerDes training and adaptation; experience with mixed-signal IO design and validation.
  • Hands-on lab experience with oscilloscopes, protocol analyzers, and BERTs; experience with optical interconnect or ability to read and debug C/C++.

Pay

$180,000 — $255,000 USD (base salary)

Tools

PCIe, Ethernet, HBM, CXL, UCIe, Python, bash, C/C++

AI focus

Validates high-speed IO and memory subsystems in hardware supporting AI systems; no AI model development work is stated.

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 5, 2026 (UTC)