Samsung
Defect Reduction Engineer
$106K–$145K
12100 Samsung Blvd, Austin, TX, USA · On-site · Full-time · Posted Oct 6, 2026
- Experience
- Minimum of 5 years.
- Education
- Bachelor’s degree in Electrical, Chemical, or Mechanical Engineering, Material Science, Chemistry, Physics, or a related technical field.
- Visa sponsorship
- Employment may be contingent on verifying U.S. Person status or the employer timely obtaining any necessary export license; export licensing is evaluated case by case.
About the job
Leads defect reduction and yield improvement across semiconductor technology nodes by defining inspection and monitoring strategies, analyzing tool and process data, and driving corrective actions with engineering teams and customers.
What you'll do
- Define and validate defect inspection and monitoring plans for new product introductions, and assess process or tool changes for defectivity impact.
- Analyze process and equipment trends to identify root causes of defects and excursions, implement corrective actions, and reduce low-yield events.
- Collaborate with engineering teams and foundry customers on best-known methods, yield targets, and technology transfers.
What they ask for
- Bachelor’s degree in a listed technical field or related technical field.
- Minimum 5 years of semiconductor process engineering experience in defect monitoring, reduction, process integration, or yield engineering.
- Expert-level application of SPC and DOE methodologies.
- Proficiency with advanced defect inspection and review tools and Klarity Defect or similar platforms.
Nice to have
- Master’s or PhD.
- Track record in leading-edge logic technology development at 14nm or below.
Pay
$106,000 - $145,000 USD base salary
Tools
Bright Field, Dark Field, E-beam, Vis-edge, Klarity Defect, SPC, DOE, GPM
Model-written summary · the original posting is authoritative