Samsung
Senior RTL Engineer, Memory Centric Computing
$138K–$206K
San Jose, California, United States · Senior · Full-time · Posted Aug 19, 2026
- Experience
- Bachelor’s with 5+ years, or Master’s with 3+ years, or PhD's with 0+ years of industry experience; also asks for 5+ years of front-end design methodology experience involving RTL development.
- Education
- Bachelor’s, Master’s, or PhD.
About the job
Develops RTL IP for memory-centric computing systems, optimizing designs for performance, power, and area and supporting verification and integration.
What you'll do
- Develop IP using Verilog, System Verilog, and HLS; optimize performance, power, and area.
- Collaborate with verification engineers on test plans and troubleshoot hardware through verification and validation.
- Make design trade-offs across performance, power, thermal, and cost; communicate with stakeholders.
What they ask for
- Bachelor’s with 5+ years, Master’s with 3+ years, or PhD's with 0+ years of industry experience.
- 5+ years of front-end design methodology experience involving RTL development for complex control and data path IPs.
- Strong background in microarchitecture and computer architecture.
- Experience designing Memory Controller, NOC, Interconnect IP; Memory Centric computing IP and SOC integration; and AI/ML workloads.
Pay
$138,000 — $206,000 USD (base salary)
Tools
Verilog, System Verilog, HLS, Memory Controller, NOC, Interconnect IP, SOC
AI focus
Develops memory-centric computing IP for AI/ML workloads and contributes to hardware and computing technologies for future AI/ML applications.
Model-written summary · the original posting is authoritative