Drimva

Samsung

Senior Staff Engineer, Design Verification

$189K–$301K

San Jose, California, United States · Senior Staff · Full-time · Posted Mar 24, 2026

Experience
Bachelor’s with 15+ years, or Master’s with 13+ years, or PhD's with 10+ years of industry experience.
Education
Bachelor’s, Master’s, or PhD's

About the job

Leads design verification for AI accelerator IP blocks, developing verification infrastructure, test plans, and validation coverage while collaborating across engineering teams.

What you'll do

  • Develop verification infrastructure and automation for builds, simulations, regressions, and triage; lead verification of AI accelerator IP blocks.
  • Create testbenches and test plans for functional and performance validation, and close verification quality metrics.
  • Document verification strategy, mentor junior engineers, and debug issues cross-functionally.

What they ask for

  • Strong SoC or IP verification and testbench development background using UVM, System Verilog, C/C++, and scripting languages such as Perl/Python.
  • Experience verifying multiple logic levels, from complex IP blocks through dies and SoCs to full-system testing.
  • Understanding of RTL and strong debugging skills.
  • Strong microarchitecture and computer architecture background, preferably in AI accelerators.

Nice to have

  • Experience with computational logic, interconnect networks, and/or memory systems.
  • Knowledge of FPGA and emulation platforms.

Pay

$189,000 — $301,000 USD base salary

Tools

UVM, System Verilog, C/C++, Perl, Python, FPGA

AI focus

Verifies IP blocks for an AI accelerator; the lab develops scalable platforms for AI/ML workloads. The posting also states that AI tools support recruitment but do not make final hiring decisions.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)