Samsung
Staff Analog/Mixed Signal Engineer
$163K–$253K
San Jose, California, United States · Staff · Full-time · Posted Oct 1, 2026
- Experience
- Bachelor’s with 10+ years, Master’s with 8+ years, or PhD with 5 years of experience in a related field.
- Education
- Bachelor’s, Master’s, or PhD in a related field.
About the job
Design and develop high-performance PLL, clocking, and SerDes analog PHY circuits for RF transceivers and high-speed I/O in advanced CMOS technologies.
What you'll do
- Design RF/analog PLL, clocking, and SerDes analog PHY circuits.
- Model and analyze mixed-signal systems, verify designs, and support production.
- Collaborate with digital and software teams to meet system requirements.
What they ask for
- Hands-on experience designing frequency synthesizer and clock-generation circuits in deep-submicron CMOS.
- Strong understanding of PLL systems and translating system knowledge into circuit specifications.
- Knowledge of IC design CAD tools, including Spectre, SpectreRF, AMS simulator, and Matlab; familiarity with Verilog and SystemVerilog.
- Understanding of physical layout requirements, ability to perform critical layouts, and lab testing skills.
Pay
$163,000 — $253,000 USD (base salary)
Tools
Spectre, SpectreRF, AMS simulator, Matlab, Verilog, SystemVerilog, CMOS
Model-written summary · the original posting is authoritative