Drimva

Samsung

Staff Emulation Engineer

$219K–$351K

San Jose, California, United States · Staff · Full-time · Posted Aug 19, 2026

Experience
Bachelor’s with 10+ years, or Master’s with 8+ years, or PhD's with 5+ years of industry experience; also requires 5+ years in both FPGA prototyping and large-scale hardware emulation.
Education
Bachelor’s, Master’s, or PhD.
Visa sponsorship
אין

About the job

Builds and maintains large-scale hardware emulation and FPGA prototyping platforms for memory-centric SoCs, enabling pre-silicon validation, software bring-up, and AI/ML workload testing.

What you'll do

  • Partition and map complex designs to emulation and multi-FPGA platforms, optimizing capacity, performance, and debug visibility.
  • Develop emulation models, transactors, co-emulation environments, and automated flows for early firmware and software bring-up.
  • Run pre-silicon AI/ML workloads and benchmarks, debug system issues, and coordinate with hardware, verification, and software teams.

What they ask for

  • Strong background in pre-silicon verification, validation, and SoC bring-up.
  • 5+ years of experience in both FPGA prototyping and large-scale hardware emulation of complex ASIC/SoC designs.
  • Hands-on experience with large-scale emulation and FPGA prototyping platforms, including multi-FPGA partitioning and timing closure.
  • Proficiency in Verilog/SystemVerilog and scripting (Tcl, Python, or Perl); experience with transactors, co-emulation (SCE-MI), speed bridges, and standard interface protocols.

Nice to have

  • Familiarity with agentic AI tools and frameworks.

Pay

$219,000 — $351,000 USD base salary

Tools

Cadence Palladium, Synopsys ZeBu, Siemens Veloce, Synopsys HAPS, Cadence Protium, Verilog/SystemVerilog, Tcl, Python

AI focus

Runs AI/ML workloads and performance benchmarks pre-silicon; automates emulation and prototyping flows using scripting and agentic AI tools and frameworks.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)