Samsung
Staff Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU
$163K–$253K
San Jose, California, United States · Staff · Full-time · Posted Aug 26, 2026
- Experience
- 8+ years with a Master’s degree, or 5+ years with a PhD; 4+ years in CPU microarchitecture or performance engineering.
- Education
- Master’s degree in Computer Engineering, Computer Science, or a related field, or PhD.
About the job
Research and develop next-generation CPU architecture for data center and agentic AI workloads, taking concepts from performance modeling through RTL implementation and silicon validation.
What you'll do
- Propose microarchitectural concepts, evaluate workload performance and bottlenecks, and guide architecture and design decisions.
- Build and validate performance models and simulators; assess features using trace-driven, analytical, and cycle-accurate methods.
- Use AI-driven design methods to implement and validate ideas, and drive research toward patents and technical publications.
What they ask for
- Master’s degree in Computer Engineering, Computer Science, or a related field with 8+ years of relevant experience, or PhD with 5+ years of relevant experience.
- 4+ years of experience in CPU microarchitecture or performance engineering; experience designing RISC-V, ARM, x86 CPU cores, or GPU/NPU vector unit.
- Strong understanding of out-of-order execution, branch prediction, pipelines, speculation, and cache/memory systems; hands-on experience with architectural simulators such as gem5.
- Proficiency in C/C++ and Python, and experience analyzing large-scale performance data and traces.
Nice to have
- Experience with AI-driven or agentic design workflows, high-level design languages, or AI-assisted RTL generation; understanding of agentic AI workload execution patterns.
- Experience in domain-specific CPU design, PPA trade-off analysis, mentoring, CPU tapeout or silicon validation, patents, or technical publications.
Pay
$163,000–$253,000 USD base salary
Tools
RISC-V, ARM, x86, gem5, C/C++, Python, RVV/SIMD
AI focus
Use AI-driven design methodologies to accelerate architectural exploration, implement CPU architecture ideas, and validate them on real silicon; the role addresses agentic AI workloads.
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