Samsung
Staff Engineer, High-Speed I/O Analog-Mixed Circuit
$163K–$253K
San Jose, California, United States · Staff · Full-time · Posted Jan 29, 2026
- Experience
- BS and 10+ years, MS and 8+ years, or PhD and 5+ years in Electrical Engineering; also requires 5+ years in the specified SoC, interface, and circuit-design areas.
- Education
- BS, MS, or PhD in Electrical Engineering; Computer Science preferred.
About the job
Designs and verifies high-speed analog and mixed-signal memory I/O circuits, including data converters, PLLs, and SERDES, and owns specifications and layout guidance.
What you'll do
- Design and simulate circuits, confirm performance, and coordinate design verification.
- Guide floor-planning and layout activities, providing requirements and hands-on layout work when needed.
- Own circuit and system specifications; document designs and simulation results.
What they ask for
- 5+ years of experience with SoC architecture, high-speed serial interfaces, and analog mixed-signal design using advanced CMOS technology nodes.
- Prior design experience with at least one standard high-speed interface, such as DDR, LPDDR, GDDR, or HBM I/O.
- Expertise in layout requirements for high-speed circuits and knowledge of high-speed I/O design, including DLL/PLL, equalization, drivers, calibration, and power design.
- Experience with high-frequency clock distribution, silicon bring-up and automated measurement, and scripting/automation using Tcl/Perl.
Nice to have
- Knowledge of Python.
- Computer Science preferred.
Pay
$163,000 — $253,000 USD (base salary)
Tools
DDR, LPDDR, GDDR, HBM, Cadence, MATLAB (Simulink), Tcl/Perl, Python
Model-written summary · the original posting is authoritative