Samsung
Staff Engineer, Memory Systems Architecture
$163K–$253K
San Jose, California, United States · Staff · Full-time · Posted Mar 20, 2026
- Experience
- 10+ years with a Bachelor’s, 8+ years with a Master’s, or 5+ years with a PhD; relevant experience in hardware fault management, reliability, data center fleet management, or a related technical field.
- Education
- Bachelor’s, Master’s, or PhD; no equivalent-experience alternative stated.
About the job
Develops memory fault-management and platform RAS solutions using in-field DRAM telemetry to identify failure patterns, reduce failures, and prevent data-center downtime.
What you'll do
- Analyze memory telemetry to identify DRAM failure modes, abnormality, and failure-rate trends; recommend mitigation solutions.
- Work with customers on ECC schemes and the value of in-field fault management; contribute to OCP standardization of DRAM/HBM failure logging.
- Develop and test platform RAS algorithms, including page offlining and hPPR, using known failure DIMMs in real servers and applications.
What they ask for
- Bachelor’s degree with 10+ years, Master’s with 8+ years, or PhD with 5+ years of relevant experience.
- Knowledge of platform memory subsystems and RAS, including ECC, page offlining, hPPR, and hardware sparing.
- ECC design and verification, reverse engineering, CPU-to-memory address mapping, and memory controller register modification experience.
- Understanding of DRAM and HBM failure modes; Linux kernel commit experience.
Pay
$163,000 — $253,000 USD base salary
Tools
DRAM, HBM, ECC, hPPR, Linux kernel, OCP
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