Drimva

SiTime

Sr. Engineer, Infrastructure Engineering

$125K–$172K

California, Santa Clara · Senior · Full-time · Posted Oct 15, 2026

Experience
10+ years of hands-on PCB layout experience.
Education
Bachelor’s degree, technical certification, or equivalent practical experience in electronics, electrical engineering, PCB design, or a related field.

About the job

Owns the physical design and release of complex PCBs for characterization, validation, test, and engineering platforms, coordinating with engineering and manufacturing teams.

What you'll do

  • Own PCB placement, routing, design reviews, fabrication release, assembly support, and post-build updates.
  • Apply electrical and manufacturing constraints, including impedance, differential routing, grounding, and DFM/DFA/DFT requirements.
  • Coordinate with engineering and supplier teams, resolve build issues, and support prototype bring-up and root-cause analysis.

What they ask for

  • 10+ years of hands-on PCB layout experience for complex, high-density electronic systems.
  • Expert-level capability in at least one major PCB layout platform, such as Cadence Allegro or Altium Designer, and working familiarity with common PCB design and review tools.
  • Experience with multilayer high-speed digital, mixed-signal, precision analog, RF, clock, and power designs.
  • Knowledge of PCB stack-ups, controlled impedance, routing constraints, grounding, power integrity, and advanced technologies such as fine-pitch BGAs and HDI.

Nice to have

  • Experience with semiconductor characterization, validation, ATE, production test, probe, or laboratory-instrumentation boards.
  • Familiarity with SI/PI tools or IPC standards; experience mentoring designers or with rigid-flex, thermal management, high-current power, or low-jitter systems.

Pay

$124,920 — $171,770 USD (base salary)

Tools

Cadence Allegro, Altium Designer, Gerber, ODB++, IPC-2221, IPC-7351, IPC-6012, IPC-A-600

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 4, 2026 (UTC)