Drimva

SK hynix

AI System Engineer

$155K–$215K

San Jose, CA +1 · Full-time · Posted Apr 24, 2025

Location
San Jose, CA
San Jose, California, United States
Experience
MS with 4+ years of hardware design experience focused on SoCs and memory subsystems; alternatively, a Ph.D. in Electrical and Computer Engineering is stated, with no years specified.
Education
Ph.D. in Electrical and Computer Engineering, or MS with 4+ years of experience in hardware design, with a focus on SoCs and memory subsystems.
Visa sponsorship
Upon accepting an offer, all new hires must complete Form I-9 verifying identity and legal authorization to work in the United States; the company participates in E-Verify.

About the job

Designs and optimizes hardware architecture, memory subsystems, and prototypes for energy-efficient AI/ML computing platforms.

What you'll do

  • Design memory-solution architecture and hardware prototypes, including RTL/IP design, verification, and FPGA prototypes.
  • Perform design-quality checks, timing closure, and hardware performance analysis; develop specifications, documentation, and test plans.
  • Collaborate with software and hardware teams and ecosystem partners on HW/SW co-optimization and system architecture.

What they ask for

  • Ph.D. in Electrical and Computer Engineering, or an MS with 4+ years of hardware design experience focused on SoCs and memory subsystems.
  • Expertise in digital design, including microarchitecture specifications, system modeling, RTL design, synthesis, timing closure, and PPA analysis.
  • Strong working knowledge and experience with an FPGA development environment.
  • Strong communication and collaboration skills for cross-functional work.

Nice to have

  • Familiarity with DRAM, HBM, NVMe, CXL, or PCIe.
  • Knowledge of AI software optimization techniques for CPU, GPU, or NPU architectures.

Pay

$155,000 — $215,000 USD (base salary)

Tools

RTL, FPGA, DRAM, HBM, NVMe, CXL, PCIe, CPU

AI focus

AI HW/SW co-design research, system modeling, and performance analysis for next-generation AI memory and storage systems; develops hardware architecture for energy-efficient AI/ML computing.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)