SK hynix
Assembly Design Kit (ADK) Engineer
$105K–$160K
San Jose, CA +1 · Full-time · Posted Oct 2, 2026
- Location
- San Jose, CA
San Jose, California, United States - Experience
- Minimum 3+ years.
- Education
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
- Visa sponsorship
- New hires must complete Form I-9 to verify identity and legal authorization to work in the United States; the employer participates in E-Verify.
About the job
Develops and maintains assembly design kits, design rules, and physical verification flows for advanced semiconductor packaging, supporting reliable, manufacturable designs through GDSII sign-off.
What you'll do
- Develop and maintain ADKs for advanced packaging technologies, and define, debug, and validate DRC and LVS checks.
- Support design teams with physical verification issues and collaborate with package design, process integration, and manufacturing teams.
- Automate and optimize verification and package design flows using scripting and industry tools.
What they ask for
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
- Minimum 3+ years of hands-on experience in Physical Design, CAD, or PDK/ADK development within the semiconductor or packaging industry.
- Extensive experience with sign-off tools from multiple vendors, such as Synopsys, Cadence, or Siemens EDA.
- Deep knowledge of design rule structures, verification methodologies, and GDSII/OASIS data formats.
Nice to have
- Scripting proficiency in Tcl, Perl, Python, or SKILL.
- Experience managing physical design flows through GDSII/OASIS sign-off and knowledge of semiconductor manufacturing processes.
Pay
$105,000 — $160,000 USD (base salary)
Tools
Synopsys, IC Validator, 3DICC, Cadence, PVS, Virtuoso, Integrity 3D-IC, Calibre
Model-written summary · the original posting is authoritative