SK hynix
Director, System in Package Architecture
$240K–$300K
San Jose, CA +1 · Director · Full-time · Posted Jul 6, 2026
- Location
- San Jose, CA
San Jose, California, United States - Experience
- 7+ years required; 10+ years preferred.
- Education
- BS in Electrical Engineering or equivalent combination of education and progressive industry experience; Master’s degree or PhD in Electrical Engineering, Materials Science, or related field preferred.
- Visa sponsorship
- Upon accepting an offer, new hires must complete Form I-9 verifying identity and legal authorization to work in the United States; the employer participates in E-Verify.
About the job
Leads development of advanced SiP architectures, especially HBM integration, to improve performance and guide packaging technology roadmaps.
What you'll do
- Lead end-to-end advanced packaging system architecture development focused on SiP performance and HBM.
- Drive mechanical and electrical test vehicle design and development as needed, and research novel technologies for SOC and HBM integration in 2.5D and 3D packaging.
- Lead collaborations with internal teams and external partners to advance technology development and time-to-market.
What they ask for
- BS in Electrical Engineering or equivalent combination of education and progressive industry experience.
- 7+ years of specialized experience in advanced packaging architecture definition, strategy, and development.
- Demonstrated success aligning engineering, product, and operations teams to deliver complex solutions.
- Strong verbal and written communication skills to articulate technical strategies.
Nice to have
- Experience managing managers or team leads; proven ability to lead, mentor, and scale engineering teams.
- Master’s degree or PhD in Electrical Engineering, Materials Science, or related field; 10+ years in advanced packaging, especially 2.5D/3D; expertise in large body substrate technologies, SI/PI, or HBM architecture and integration.
Pay
$240,000 — $300,000 USD (base salary)
Tools
System in Package (SiP), High Bandwidth Memory (HBM), SOC, 2.5D, 3D, Signal Integrity (SI), Power Integrity (PI)
Model-written summary · the original posting is authoritative