Snap
Custom IC Layout Engineer
$147K–$259K
Vancouver, WA - 805 Broadway · Full-time · Posted Oct 19, 2026
- Experience
- 5+ years in directly applicable work performing custom layout; BSEE or relevant years of experience.
- Education
- BSEE or relevant years of experience.
About the job
Design and verify custom analog and mixed-signal layouts for AR display ICs, improving area, performance, and power while supporting full-chip implementation.
What you'll do
- Create cell and block layouts, extract parasitics, and iterate designs to meet design rules and performance goals.
- Collaborate with digital, analog, circuit, and physical design teams; support floor planning and place-and-route.
- Develop reusable automation scripts and methodologies, and provide design documentation and program schedule and cost inputs.
What they ask for
- Strong working knowledge of transistor-level custom layout and matching techniques.
- Strong working knowledge of Cadence Virtuoso and Mentor/Siemens Calibre.
- Experience with scripting and automation in a Linux environment, using tools such as TCL, SKILL, Perl, Python, or Shell scripts.
- Ability to perform tape-out verification including DRC, ERC, and LVS; understand signal integrity, reliability, layout effects, and foundry DFM requirements.
Nice to have
- Detailed understanding of 22nm and below CMOS foundry design rules; experience with both analog and memory layouts.
- Knowledge of ASIC IC test and characterization, and digital design and place-and-route principles.
Pay
$173,000-$259,000 annually USD (base salary); $164,000-$246,000 annually USD (base salary); $147,000-$220,000 annually USD (base salary)
Tools
Cadence Virtuoso, Mentor/Siemens Calibre, TCL, SKILL, Perl, Python, Shell scripts, Linux
Model-written summary · the original posting is authoritative