Snap
Digital IC Design Manager
$195K–$343K
Vancouver, WA - 805 Broadway · Manager · Full-time · Posted Sep 30, 2026
- Experience
- 10+ years in directly applicable physical design / digital implementation; minimum of 3 years in a management role.
- Education
- BSEE or MSEE.
About the job
Leads a team designing and implementing digital ICs for AR microdisplays, including RTL development, physical design, and continuous improvement of implementation flows.
What you'll do
- Manage digital design and physical design engineers, including hiring and staff development.
- Lead RTL design and RTL-to-GDS implementation for display ICs, including synthesis, DFT, floorplanning, place-and-route, timing closure, and physical verification.
- Coordinate with chip architecture, verification, analog design, and test teams; specify tools and develop automation.
What they ask for
- BSEE or MSEE.
- 10+ years in directly applicable physical design / digital implementation work.
- Minimum of 3 years experience in a management role.
- Working knowledge of logic design and RTL coding, digital implementation, IP integration, and the specified design tools.
Nice to have
- Knowledge of analog, mixed-signal circuit design, and custom layout.
- Knowledge of Siemens QuestaSim, Siemens Veloce Emulator, Tessent DFT, Conformal LEC, or Virtuoso custom layout.
Pay
$229,000-$343,000 annually USD (base salary); $218,000-$326,000 annually USD (base salary); $195,000-$292,000 annually USD (base salary)
Tools
Cadence Innovus, Tempus, Genus, PVS, Mentor/Siemens Calibre, TCL, SKILL, Python
Model-written summary · the original posting is authoritative