Tacit
RFIC Silicon Lead
$180K–$230K
San Francisco · On-site · Full-time · Posted Jun 22, 2026
- Experience
- 10+ years in RFIC design; substantial industry experience delivering silicon.
- Education
- MS or PhD in electrical engineering, or equivalent experience.
- Visa sponsorship
- Visa sponsorship.
About the job
Defines Tacit’s ultra-low-power CMOS RF architecture and leads RFIC design decisions from transistor-level implementation through silicon validation.
What you'll do
- Translate sensing, ML, and product constraints into RF architecture and circuit requirements; design or direct critical RF blocks.
- Establish the RFIC design environment, evaluate process options, and drive power reduction and frequency-generation approaches.
- Lead implementation through tape-out and bring-up; manage external silicon partners and help build the internal team.
What they ask for
- MS or PhD in electrical engineering, or equivalent experience.
- 10+ years in RFIC design, including substantial industry experience delivering silicon.
- Deep experience in low-power CMOS RF, synthesizers, radar, UWB, frequency-agile radios, or related sensing systems.
- Transistor-level design expertise with Cadence Virtuoso, Spectre, and ADE; experience taking RFIC blocks or systems through silicon validation.
Nice to have
- Experience with fast-settling PLLs, wideband frequency generation, duty-cycled RF systems, or ultra-low-power sensing radios.
- Experience as an early silicon hire or managing external silicon partners.
Pay
$180,000 - $230,000/year (base salary)
Tools
Cadence Virtuoso, Spectre, ADE, EMX, HFSS, Momentum, Calibre, PDK
AI focus
Translate ML constraints into circuit-level requirements for Tacit’s sensing systems.
Model-written summary · the original posting is authoritative