Drimva

Tensordyne

Principal ASIC Architect

Sunnyvale, CA +1 · Principal · Full-time · Posted Apr 2, 2026

Location
Sunnyvale, CA
San Jose, California, United States
Experience
15+ years
Education
MS or PhD in Electrical Engineering, Computer Engineering, or related engineering discipline

About the job

Leads architecture definition, design, and delivery of next-generation ASIC processors for generative AI inference acceleration.

What you'll do

  • Define processor architecture and design specifications, including compute, memory, networking, and connectivity.
  • Lead architectural modeling and design planning to meet performance, accuracy, power, programmability, and manufacturability goals.
  • Coordinate with engineering and software teams, external partners, and leadership; guide reviews and mentor colleagues.

What they ask for

  • 15+ years of hands-on silicon design and architecture experience with high-performance compute processors, HBM, and high-speed SerDes networking for AI workloads.
  • Strong understanding of generative AI algorithms, attention mechanisms, foundation transformer models, and mapping them to hardware.
  • Strong Verilog skills and experience with RTL verification, performance modeling, analysis, debugging, and optimization.
  • Expert-level C/C++ and experience developing architectural C-models, SystemC, or TLM; scripting with Python or Perl. MS or PhD in Electrical Engineering, Computer Engineering, or a related engineering discipline.

Tools

Verilog, C/C++, SystemC, TLM, Python, Perl, RISC-V, HBM

AI focus

Architects and designs custom silicon processors to accelerate multimodal generative AI inference.

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)