Tenstorrent
CPU Core Design Verification Testbench Lead
Austin, Texas, United States +2 · Full-time · Posted May 22, 2026
- Location
- Austin, Texas, United States
Santa Clara, California, United States
Santa Clara, California, United States - Experience
- 8+ years; candidates at various experience levels are welcome, with level assessed during interviews.
- Visa sponsorship
- Employment is contingent on eligibility to access U.S. export-controlled technology. Depending on citizenship/permanent residency status, prior license approval may be required; an offer may be rescinded if employment is not possible under U.S. export laws.
About the job
Lead development and verification of core-level testbenches for high-performance out-of-order RISC-V CPUs, including verification infrastructure, stimulus, debug, and coverage.
What you'll do
- Own and evolve CVM-based testbench methodology, infrastructure, and reusable components.
- Plan and drive functional verification of CPU features, ISA behavior, and microarchitectural scenarios; develop stimulus and functional models.
- Improve testbenches and debug regressions across simulation, emulation, and post-silicon, using Python tooling and AI agents to accelerate triage.
What they ask for
- 8+ years in CPU verification, CPU testbench development, or closely related digital design.
- Hands-on experience building and owning CPU core-level testbenches.
- In-depth knowledge of high-performance out-of-order CPU microarchitecture.
- Experience developing testbench infrastructure in CVM methodology.
Nice to have
- UVM experience.
Tools
RISC-V, CVM, UVM, RTL, assembly, C/C++, Python
AI focus
Use AI-assisted verification workflows and specialized AI agents for debug, stimulus creation, coverage analysis, regression triage, and root-cause analysis; validate outputs with engineering judgment.
Model-written summary · the original posting is authoritative