Tenstorrent
CPU Microarchitect, Vector and Matrix Compute
$100K–$500K
Santa Clara, California, United States +2 · Full-time · Posted Aug 10, 2026
- Location
- Santa Clara, California, United States
Spain
Santa Clara, California, United States - Experience
- 5+ years of experience in CPU design for high-performance computing and AI acceleration.
- Visa sponsorship
- Employment is contingent on eligibility to access U.S. export-controlled technology; depending on citizenship/permanent residency status, prior license approval may be required.
About the job
Architect and micro-architect RISC-V CPU vector, floating-point, and matrix compute units for HPC and AI workloads, optimizing performance, power, and area.
What you'll do
- Define CPU compute architecture and micro-architecture, including execution units and subsystems.
- Translate HPC/AI workload needs into scalable architectures and specifications, collaborating with software, silicon, and external IP teams.
- Lead cross-functional work from architecture concept through silicon implementation.
What they ask for
- Experience designing hardware for matrix floating-point computation, AI accelerators, vector processing, tensor engines, or machine-learning workloads.
- Knowledge of CPU architecture, memory hierarchy, data movement, cache coherency, and CPU/AI-accelerator interactions.
- Experience defining architectural specifications and leading cross-functional teams through silicon implementation.
- Experience with RTL development with cutting edge AI frontier models.
Pay
$100k - $500k (USD; total pay, including base and variable compensation targets)
Tools
RISC-V, RVV, RTL
AI focus
Design CPU compute architecture for AI inference and training workloads, including matrix floating-point execution and heterogeneous compute.
Model-written summary · the original posting is authoritative