Drimva

Tenstorrent

Engineering Program Manager, RISCV

$100K–$500K

Austin, Texas, United States +1 · Manager · Full-time · Posted Oct 22, 2025

Location
Austin, Texas, United States
Santa Clara, California, United States
Experience
Candidates at various experience levels are welcome; no years specified.
Visa sponsorship
Employment is contingent on eligibility to access U.S. export-controlled technology; depending on citizenship/permanent residency status, prior license approval may be required.

About the job

Drives cross-functional execution of RISC-V CPU development from specification through tapeout and post-silicon debug.

What you'll do

  • Own defined workstreams across the CPU development cycle and maintain schedules, dependencies, and resourcing.
  • Coordinate engineering teams, track milestones, and surface and help resolve risks.
  • Support project reviews and report metrics, risks, and mitigation plans to senior leadership.

What they ask for

  • Experience in CPU, SoC, or silicon development as an engineer, technical lead, or program manager.
  • Hands-on experience with at least one silicon program through a major milestone such as tapeout, bring-up, or IP release.
  • Ability to coordinate cross-functional engineering teams and translate technical detail into clear status, dependencies, and trade-offs.
  • Clear communication and proactive organization.

Nice to have

  • Exposure to Functional Safety (FuSa) standards, especially ISO 26262.
  • Exposure to automotive hardware development requirements.

Pay

$100k - $500k (total pay; includes base and variable compensation targets)

Tools

RISC-V, ISO 26262

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 5, 2026 (UTC)