Tenstorrent
Physical Design CPU Methodology Engineer
$100K–$500K
Santa Clara, California, United States +1 · Full-time · Posted Sep 10, 2026
- Location
- Santa Clara, California, United States
Austin, Texas, United States - Experience
- 10+ years; candidates at various experience levels are welcome and will be assessed for the appropriate level.
- Visa sponsorship
- Employment is contingent on eligibility to access U.S. export-controlled technology; depending on citizenship or permanent-residency status, prior license approval may be required.
About the job
Defines and scales physical-design methodology, automation, and signoff infrastructure for high-performance CPU cores across advanced process nodes.
What you'll do
- Own CPU physical-design methodology across synthesis, floorplanning, power planning, place and route, CTS, extraction, STA, SI, EM/IR, and physical verification.
- Develop automation, quality metrics, signoff criteria, dashboards, checkers, and debug workflows to improve predictability, turnaround time, and PPA.
- Explore AI/ML-enabled physical-design tools and collaborate across engineering, CAD, program, and EDA teams.
What they ask for
- 10+ years of ASIC/SoC/CPU experience, ideally with high-performance CPUs or similarly complex digital designs.
- Deep expertise in RTL-to-GDS implementation and signoff, including timing closure, power optimization, SI, EM/IR, extraction, and physical verification.
- Experience building or owning physical-design methodology, automation, or CAD flows.
- Proficiency in Tcl, Python, Perl, or similar scripting languages.
Pay
$100k - $500k including base and variable compensation targets (base and variable compensation; not stated as a base-salary or total-pay range)
Tools
Tcl, Python, Perl
AI focus
Explore and productize AI/ML-enabled physical-design tooling, including hotspot prediction, congestion forecasting, timing-risk classification, ECO prioritization, IR-drop screening, and flow tuning.
Model-written summary · the original posting is authoritative