Drimva

Tenstorrent

Sr Staff Engineer, SoC RTL Design

Toronto, Ontario, Canada +1 · Senior Staff · Full-time · Posted Oct 30, 2024

Location
Toronto, Ontario, Canada
Boston, Massachusetts, United States
Visa sponsorship
Employment is contingent on eligibility to access U.S. export-controlled technology; depending on citizenship/permanent residency status, prior license approval may be required.

About the job

Designs and optimizes RTL and SoC architectures for high-performance AI and compute workloads, from IP microarchitecture through implementation.

What you'll do

  • Define architecture and implement RTL for custom IP blocks and SoC components.
  • Make performance-aware design decisions for compute, interconnect, or memory-heavy blocks; support synthesis and timing closure.
  • Occasionally contribute to validation using emulation, FPGA prototyping, or UVM flows.

What they ask for

  • Deep understanding of computer architecture and IP microarchitecture.
  • RTL development experience with Verilog/VHDL and familiarity with full ASIC flows.
  • Ability to optimize power, performance, and area (PPA) under aggressive design goals.
  • Strong synthesis and timing-closure awareness.

Nice to have

  • Prior experience in on-chip fabric and interconnect designs.

Tools

Verilog, VHDL, ASIC, emulation, FPGA, UVM

AI focus

Designs IP and SoC components for next-generation AI and compute workloads.

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 5, 2026 (UTC)