Drimva

Tenstorrent

Staff Engineer,Post-Silicon Validation

$100K–$500K

Austin, Texas, United States +3 · Staff · Full-time · Posted Sep 28, 2026

Location
Austin, Texas, United States
Santa Clara, California, United States
Austin, Texas, United States
Santa Clara, California, United States
Experience
5+ years; the posting also welcomes candidates at various experience levels, with level assessed during interviews.
Visa sponsorship
Employment is contingent on eligibility to access U.S. export-controlled technology; depending on citizenship or permanent residency status, prior license approval may be required.

About the job

Lead post-silicon bring-up, validation, and debug of RISC-V-based SoCs from first silicon through production readiness.

What you'll do

  • Lead first-silicon bring-up and execute post-silicon validation plans.
  • Debug silicon issues across CPU cores, interconnects, memory subsystems, peripherals, and high-speed interfaces.
  • Develop and debug bare-metal tests and boot flows; collaborate on Linux bring-up, driver validation, ECO validation, and fixes for future silicon revisions.

What they ask for

  • 5+ years of experience in SoC bring-up, validation, and silicon debug.
  • Strong grasp of CPU and SoC architectures, including RISC-V privilege modes, caches, coherency, and memory systems.
  • Hands-on ability to debug hardware/software interaction issues using lab tools and low-level software.

Pay

$100k - $500k including base and variable compensation targets (base and variable compensation; not specified as base salary or total pay).

Tools

RISC-V, Linux

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 5, 2026 (UTC)