Drimva

Tenstorrent

Technical Program Manager, Architecture

$100K–$500K

Santa Clara, California, United States · Manager · Full-time · Posted Mar 23, 2026

Experience
10+ years of semiconductor experience; listed alternatives are CPU, Physical Design, RTL, Design Verification, or Program Management. Candidates at various experience levels will be assessed and leveled during interviews.
Education
Bachelor’s or Master’s degree in Electrical/Computer Engineering or related field.
Visa sponsorship
Employment is contingent on eligibility to access U.S. export-controlled technology. Depending on citizenship or permanent-residency status, or ability to obtain prior license approval, an offer may be contingent; it will be rescinded if employment is not possible under U.S. export laws.

About the job

Drives end-to-end execution of next-generation SoC programs from architecture through tape-out and post-silicon validation.

What you'll do

  • Coordinate SoC development across architecture, RTL, verification, DFT, physical design, tape-out, and post-silicon validation.
  • Lead cross-functional engineering teams, manage dependencies, and keep technical and non-technical teams aligned.
  • Break complex programs into goals and deliverables and provide structured reporting.

What they ask for

  • Bachelor’s or Master’s degree in Electrical/Computer Engineering or a related field.
  • 10+ years of semiconductor experience in CPU, Physical Design, RTL, Design Verification, or Program Management.
  • Strong understanding of chip architecture, design flows, and system-level tradeoffs.
  • Experience leading large cross-functional engineering teams and managing dependencies; proficiency with project management tools such as JIRA and Confluence.

Nice to have

  • Familiarity with industry standards across compute and SoC, such as ARM, RISC-V, AI accelerators, and interconnect protocols.

Pay

$100k - $500k (base and variable compensation targets; combined range, not separated into base salary and total pay)

Tools

CPU, Physical Design, RTL, Design Verification, ARM, RISC-V, AI accelerators, JIRA

AI focus

The role coordinates SoC programs that integrate AI accelerators and supports development of AI compute platforms.

Model-written summary · the original posting is authoritative

First seen Oct 10, 2026 · Last verified Nov 4, 2026 (UTC)