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Senior SoC Digital Design Engineer, Multimedia Lab
San Jose, California · Senior · Full-time · Posted Oct 28, 2026
- Experience
- 3+ years; open to highly promising candidates with less experience.
- Education
- Bachelor's degree or higher in Microelectronics, Integrated Circuits, Computer Science, Electrical Engineering, or a related field.
About the job
Designs and implements SoC digital hardware for video codec acceleration, including architecture evaluation, RTL, design checks, and low-power optimization.
What you'll do
- Help define SoC or subsystem architecture and evaluate power, performance, and area.
- Implement and document RTL; perform lint, CDC, and RDC checks and collaborate on verification and backend flows.
- Contribute to low-power strategies using clock gating, power gating, and UPF.
What they ask for
- Bachelor’s degree or higher in a stated related field.
- 3+ years of digital front-end design experience; less experience may be considered for highly promising candidates.
- Mastery of Verilog/SystemVerilog and a solid foundation in digital circuits.
- Proficiency with mainstream front-end EDA tools and at least one scripting language for workflow automation.
Nice to have
- Understanding of NPU architecture, HW/SW co-design, and AI hardware acceleration.
- SoC performance profiling, complex subsystem integration, or advanced-node tape-out experience.
Tools
Verilog, SystemVerilog, Spyglass, Design Compiler, PrimeTime, Python, Perl, Tcl
AI focus
Preferred experience includes NPU architecture and AI hardware acceleration.
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