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SoC Digital Design Engineer, Multimedia Lab
San Jose, California · Full-time · Posted Oct 28, 2026
- Experience
- 1+ years; open to highly promising candidates with less experience.
- Education
- Bachelor's degree or higher in Microelectronics, Integrated Circuits, Computer Science, Electrical Engineering, or a related field.
About the job
Designs and implements SoC digital hardware, including architecture evaluation, RTL, front-end checks, low-power features, and support for verification and implementation flows.
What you'll do
- Help define SoC or subsystem architecture and evaluate power, performance, and area.
- Write and document Verilog/SystemVerilog RTL; perform lint, CDC, and RDC checks.
- Collaborate on verification, synthesis, timing analysis, power optimization, and low-power design.
What they ask for
- Bachelor's degree or higher in Microelectronics, Integrated Circuits, Computer Science, Electrical Engineering, or a related field.
- 1+ years of digital front-end design experience; less experience may be considered for highly promising candidates.
- Mastery of Verilog/SystemVerilog and a solid foundation in digital circuits.
- Proficiency with mainstream front-end EDA tools and at least one scripting language: Python, Perl, Tcl, or Makefile.
Nice to have
- Understanding of NPU architecture, HW/SW co-design, and AI hardware acceleration.
- SoC performance profiling or complex subsystem integration experience, or advanced-node tape-out experience.
Tools
Verilog, SystemVerilog, Spyglass, Design Compiler, PrimeTime, Python, Perl, Tcl
AI focus
Preferred experience includes NPU architecture and AI hardware acceleration.
Model-written summary · the original posting is authoritative