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SoC Digital Verification Engineer, Multimedia Lab

San Jose, California · Full-time · Posted Oct 28, 2026

Experience
1+ years of working experience in ASIC/SoC verification.
Education
Bachelor's degree or higher in Microelectronics, Computer Science, Electronic Communications, or a related field.

About the job

Verifies video codec hardware accelerators at module, subsystem, and SoC levels, developing test plans and UVM environments and driving simulation, coverage, and regression closure.

What you'll do

  • Develop verification plans, reusable UVM testbenches, and constrained-random and directed tests.
  • Run gate-level and timing simulations, drive functional and code coverage closure, and support FPGA or emulation-based debugging.
  • Maintain regression scripts and automation to improve verification efficiency and compute utilization.

What they ask for

  • Bachelor's degree or higher in Microelectronics, Computer Science, Electronic Communications, or a related field.
  • 1+ years of working experience in ASIC/SoC verification.
  • Mastery of SystemVerilog and UVM, including independently building IP- or SoC-level verification environments.
  • Proficiency with simulation and debugging tools and Python/Perl/Shell scripting for automation.

Nice to have

  • Familiarity with SoC subsystem architectures, protocols, and data flows; hands-on experience with hardware emulation or FPGA prototyping.
  • Proficiency in formal verification; experience in SoC-level performance and power-aware verification.

Tools

SystemVerilog, UVM, VCS, Incisive, Questa, Verdi, Python, Perl

Model-written summary · the original posting is authoritative

First seen Oct 28, 2026 · Last verified Nov 5, 2026 (UTC)