Unconventional AI
AI Silicon, Design Verification
Mountain View, CA +2 · Remote · Full-time · Posted Apr 6, 2026
- Location
- Mountain View, CA
Mountain View
Remote - Experience
- Minimum of 8 years of hands-on experience with advanced verification methodologies and languages.
- Education
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
About the job
Own design verification for semiconductor IP and full-chip designs, from verification planning and testbench development through coverage analysis and tape-out.
What you'll do
- Define and implement verification plans, infrastructure, and scalable testbenches for IP blocks and full-chip designs.
- Use UVM/SystemVerilog for constrained-random testing, coverage-driven verification, and assertions; debug RTL- and gate-level failures.
- Collaborate with digital, analog, software, and systems teams to set requirements and resolve hardware/software interactions.
What they ask for
- Hands-on experience with UVM and SystemVerilog.
- Developed and maintained complex verification testbenches and automated test environments.
- Proficiency in Python, Shell, or Bash for automation and analysis.
- Familiarity with Linux and industry-standard tools from Cadence and Synopsys.
Nice to have
- Master's degree or Ph.D. in Electrical Engineering or Computer Science, with emphasis on computer architecture.
- Expert-level UVM architecture and high-level behavioral modeling; experience with modern AI-driven code generation tools.
Tools
UVM, SystemVerilog, Python, Shell, Bash, Linux, Cadence, Synopsys
AI focus
Experience with modern AI-driven code generation tools is preferred.
Model-written summary · the original posting is authoritative