Upscale AI
Signal Integrity Senior Engineer
$159K–$170K
US - Santa Clara, CA · On-site · Senior · Full-time · Posted Jun 22, 2026
- Experience
- 5+ years in Signal Integrity, High-Speed Design, or related areas.
- Education
- BS/MS in Electrical Engineering or related field.
About the job
Leads signal and power integrity analysis, modeling, simulation, and validation for complex high-speed PCB and system designs.
What you'll do
- Define SI/PI architecture, design rules, channel budgets, PCB stackups, and routing requirements.
- Simulate and validate channels, correlate results with laboratory measurements, and resolve signal integrity issues.
- Provide technical leadership and collaborate with engineering teams, vendors, and customers.
What they ask for
- BS/MS in Electrical Engineering or a related field.
- Strong understanding of signal and power integrity, electromagnetic theory, transmission lines, high-speed SerDes, PCB/package design, and channel compliance.
- Hands-on experience with Ansys HFSS, Cadence Clarity, Cadence Sigrity, and Keysight ADS.
- Laboratory experience with VNAs, TDR/TDT systems, high-bandwidth oscilloscopes, de-embedding, and calibration.
Nice to have
- Experience with 112G/224G PAM4 SerDes, Ethernet, PCIe, UCIe, CXL, DDR, or AI networking products.
- Experience with Python, MATLAB, automation frameworks, or leading SI strategy for large hardware programs.
Pay
USD 159,000–170,000 per-year-salary; base salary
Tools
Ansys HFSS, Cadence Clarity, Cadence Sigrity, Keysight ADS, Vector Network Analyzer (VNA), TDR/TDT systems, Python, MATLAB
AI focus
Works on high-speed hardware infrastructure supporting AI workloads; AI networking products are listed as relevant experience.
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