Design Verification Engineer- AI Accelerator

What you'll do

• Create test plans and build verification environments, including stimulus, checkers, assertions, and coverage.
• Develop GEMM and GEMV reference models and verify accelerator data flow, precision, and quantization.
• Run regressions, track bugs and coverage, and support emulation and pre-silicon bring-up with compiler and runtime teams.

What they ask for

• 8 or more years verifying high performance compute or complex digital designs.
• High-level understanding of LLMs, including transformer structure and inference data flow; knowledge of GEMM and GEMV and their hardware mapping.
• Experience with SystemVerilog, UVM, C and C++, assertions, coverage-driven verification, and reference models in C, C++ or Python.
• Understanding of numerical formats and precision tradeoffs; independent design-unit verification ownership from test plan through coverage closure; BS or higher in Computer Engineering, Electrical Engineering or Computer Science.

Nice to have

• Experience porting LLM or neural network models to RTL, verifying custom accelerators, or with systolic arrays, tensor cores, attention, KV cache or mixture of experts hardware.
• Experience with PyTorch, ONNX, formal verification, gate-level simulation, silicon bring-up, performance modeling, or AI-assisted verification workflows.

Pay

USD 200,000–300,000 per-year-salary (base salary)

Tools

SystemVerilog, UVM, C, C++, Python, PyTorch, ONNX

AI focus

Verification of custom AI acceleration units for LLM and vision workloads, including GEMM/GEMV compute, numerical behavior, and performance.