Drimva

Voltai

Emulation & FPGA Prototyping Engineer

Palo Alto Office · Full-time · Posted Oct 19, 2026

Experience
5+ years of emulation or FPGA prototyping experience.

About the job

Owns emulation and FPGA prototyping for SoCs and subsystems, enabling early software bring-up, validation, and system-scale debugging while generating data for Voltai’s models.

What you'll do

  • Build and maintain emulation and FPGA prototyping platforms; map designs, including partitioning and timing closure.
  • Enable software bring-up, system validation, and performance analysis; debug hardware/software issues.
  • Automate emulation compile, run, and triage, and generate system-level data to train and evaluate models.

What they ask for

  • Hands-on experience with Palladium, ZeBu, Veloce, or HAPS.
  • Strong SystemVerilog and FPGA tooling (Vivado, Quartus) experience.
  • Experience with hardware/software co-verification and debug.
  • Python, Tcl, or C/C++ scripting.

Nice to have

  • Experience with transactors and hybrid emulation.
  • Linux driver or firmware bring-up experience; interest in AI-assisted design tools.

Tools

Palladium, ZeBu, Veloce, HAPS, SystemVerilog, Vivado, Quartus, Python

AI focus

Generate system-level data to train and evaluate Voltai’s models; the role also welcomes interest in AI-assisted design tools.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 4, 2026 (UTC)