Voltai
Physical Design Engineer
Palo Alto Office · Full-time · Posted Oct 19, 2026
- Experience
- 5+ years of physical design experience with multiple production tapeouts.
About the job
Own physical implementation from netlist to GDSII, close designs for signoff, and help evaluate and improve AI-generated physical design decisions.
What you'll do
- Lead block-level and full-chip implementation, including floorplanning, placement, clock tree synthesis, and routing.
- Drive timing, power, congestion, physical verification, and power-integrity closure; improve place-and-route flows and automation.
- Evaluate AI-generated floorplans and implementation decisions, and work with customer teams on design challenges.
What they ask for
- Deep experience with Innovus or Fusion Compiler/ICC2.
- Strong understanding of timing closure, clock tree synthesis, and power distribution networks.
- Experience at advanced nodes (7nm and below).
- Strong Tcl and Python scripting.
Nice to have
- Full-chip integration or hierarchical design experience; experience with high-speed or low-power designs.
- Interest in AI or machine learning applied to physical design.
Tools
Innovus, Fusion Compiler, ICC2, Tcl, Python
AI focus
Evaluate AI-generated floorplans and implementation decisions, help define quality criteria, and help AI learn expert physical design decisions.
Model-written summary · the original posting is authoritative