Voltai
Physical Verification & Signoff Engineer
Palo Alto Office · Full-time · Posted Oct 19, 2026
- Experience
- 5+ years of physical verification or signoff experience on production tapeouts.
About the job
Owns physical verification and reliability signoff for silicon tapeouts, while building automation and helping develop AI methods to identify and fix signoff issues.
What you'll do
- Own DRC, LVS, ERC, antenna, IR drop, electromigration, and power integrity signoff.
- Debug violations with physical design teams and manage tapeout checklists and foundry deliverables.
- Automate signoff runs, triage, and reporting, and help define AI-assisted triage and fixes.
What they ask for
- 5+ years of physical verification or signoff experience on production tapeouts.
- Deep experience with Calibre or IC Validator.
- Experience with RedHawk or Voltus for IR/EM analysis.
- Strong understanding of foundry rule decks at advanced nodes; Tcl, Python, or SVRF scripting.
Nice to have
- Experience with 2.5D/3D packaging or chiplet integration signoff.
- Direct foundry interface experience; interest in AI-assisted design tools.
Tools
Calibre, IC Validator, RedHawk, Voltus, Tcl, Python, SVRF
AI focus
Help Voltai's AI learn to find and fix signoff issues, including defining AI-assisted triage and fixes.
Model-written summary · the original posting is authoritative