Drimva

Voltai

Research Engineer - Mid-Training

Palo Alto Office · Full-time · Posted Nov 6, 2025

About the job

Train frontier models to become semiconductor design and verification experts, supporting reinforcement learning and automated chip development.

What you'll do

  • Develop methods for generating and curating synthetic design data, model distillation, and continual learning.
  • Create evaluations with hardware engineers, RL researchers, and verification specialists to guide data quality and model improvement.
  • Scale efficient training across thousands of GPUs and RL environments, and build tools to study data and simulation effects.

Nice to have

  • Experience training LLMs or foundation models on semiconductor design and verification corpora.
  • Experience modeling design scaling laws, generating synthetic design data, or building evaluations tied to downstream design metrics.

Tools

LLMs, RTL, netlists, PDKs, GPUs

AI focus

Train and improve frontier models for semiconductor design and verification, including synthetic data generation, distillation, continual learning, and evaluations for automated chip development.

Model-written summary · the original posting is authoritative

First seen Oct 29, 2026 · Last verified Nov 5, 2026 (UTC)