Voltai
Research Engineer - Post-Training
Palo Alto Office · Full-time · Posted Nov 6, 2025
About the job
Post-trains frontier models to perform semiconductor design and verification tasks, using reinforcement learning environments, reward functions, and evaluation frameworks.
What you'll do
- Build reinforcement-learning environments and post-training approaches for chip design and verification workflows.
- Develop reward functions, scaling strategies, evaluation frameworks, datasets, and benchmarks for semiconductor reasoning.
- Collaborate with hardware, verification, and computer-architecture experts to define metrics, constraints, and simulation conditions.
Nice to have
- Experience creating and scaling RL environments for LLMs or multimodal agents.
- Experience with evaluation datasets and benchmarks, hardware or verification collaboration, reward design, large-scale RL fine-tuning, or reinforcement/curriculum learning for structured reasoning.
Tools
LLMs, RL
AI focus
Train and evaluate AI models to propose and optimize chip architectures, generate and refine RTL, run simulations, identify verification gaps, and iteratively improve designs.
Model-written summary · the original posting is authoritative