Drimva

Waymo

Staff ML Accelerator Architect

$251K–$310K

Mountain View, CA, USA +3 · Staff · Full-time · Posted Oct 19, 2026

Location
Mountain View, CA, USA
New York, New York, USA
Mountain View, California, United States
New York, New York, United States
Experience
10+ years in complex, high-performance architecture design or architecture, in industry or through doctoral research; 3+ years in machine-learning architectures, acceleration, and model optimization.
Education
M.S. in Computer Science or Computer Engineering, or equivalent practical experience.

About the job

Architects and evaluates hardware and software solutions to accelerate machine-learning inference workloads for autonomous driving.

What you'll do

  • Analyze inference workloads, map them to hardware, and project performance.
  • Build tools to model and evaluate inference performance; collaborate with compiler and model developers on engineering tradeoffs.
  • Architect, simulate, and design hardware solutions for autonomous-driving models, working with cross-functional teams.

What they ask for

  • M.S. in Computer Science or Computer Engineering, or equivalent practical experience.
  • 10+ years designing or architecting complex, high-performance architectures, including CPUs, GPUs, and/or ML accelerators.
  • 3+ years of experience with machine-learning architectures, acceleration, and model optimization.
  • Deep knowledge of ML model architectures and compute characteristics; strong programming and algorithmic problem-solving skills.

Nice to have

  • Track record delivering novel hardware-software solutions that improve ML inference performance and efficiency; ability to lead cross-functional teams.
  • Familiarity with semiconductor technologies and tradeoffs across the hardware stack; experience with microarchitecture design using SystemVerilog or HLS.

Pay

$251,000–$310,000 USD base salary

Tools

CPUs, GPUs, ML accelerators, SystemVerilog, HLS

AI focus

Accelerates machine-learning inference for autonomous-driving models through workload analysis, hardware mapping, performance modeling, and hardware architecture design.

Model-written summary · the original posting is authoritative

First seen Oct 20, 2026 · Last verified Nov 5, 2026 (UTC)